FIG. 11 is a circuit diagram illustrating a structure of a conventional three bit phase shifter, In the figure, three bit phase shifter 900 includes three reflection phase shifters 900a to 900c providing different phase shift quantities from each other. The reflection phase shifters 900a to 900c are connected in series between an input terminal 1 and an output terminal 2.
The reflection phase shifter 900a comprises a 3 dB directional coupler 3 and a reflection circuit 90 interposed between opposite ends of the 3 dB directional coupler 3. The reflection circuit 90 includes two FETs 4a and 4b whose sources are grounded and whose drains are connected through transmission lines 6a and 6b to the respective ends of the 3 dB directional coupler 3. Reference numerals 5a and 5b designate gate bias terminals of the FETs 4a and 4b, respectively.
Since the reflection phase shifters 900b and 900c are identical to the reflection phase shifter 900a, only blocks are illustrated for the reflection phase shifters 900b and 900c in FIG. 11 for simplification.
A description is given of the operation.
Initially, the operating principle of a reflection phase shifter in which a reflection (.GAMMA..sub.T) is connected between opposite ends of an ideal 3 dB directional coupler is described.
Characteristics of the reflection phase shifter are represented in an S matrix as follows: ##EQU1## where a1 is an input power and b1 to b4 are reflected Dowers of the input power to the respective ends of the 3 dB directional coupler.
In addition, f1 and f2 in the equation (1) are operating characteristics of the ideal 3 dB directional coupler and represented as follows: ##EQU2## wherein .THETA. is the electrical length of the 3 dB directional coupler and k is the coupling coefficient of the 3 dB directional coupler.
The equation (1) is converted to EQU b1=f1.GAMMA..sub.T b2+f2.GAMMA..sub.T b4 (4) EQU b2=f1a1 (5) EQU b3=f2.GAMMA..sub.T b2+f1.GAMMA..sub.T b4 (6) EQU b4=f2a1 (7)
From these equations (4) to (7), following S parameters are obtained. EQU S11=S22=b1/a1=f1.sup.2.GAMMA..sub.T (8) EQU S21=S12=b3/a1=2f1f2.GAMMA..sub.T (9)
Since the 3 dB directional coupler is an ideal one, the coupling coefficient k is 1/.sqroot.2 and the electrical length .THETA. is 90.degree.. Accordingly, EQU f1=1.sqroot.2 (10) EQU f2=j.multidot.-1/.sqroot.2 (11)
When the equations (10) and (11) are combined, the equation (9) is converted to EQU S 21=S12=2f1f2.GAMMA..sub.T=- k.GAMMA..sub.T (12)
From the equation (12), it is found that the phase shift quantity of the reflection phase shifter including the ideal 3 dB directional coupler is determined by the reflection (.GAMMA..sub.T) connected between the opposite ends of the 3 dB directional coupler.
FIG. 12(a) illustrates a part of the reflection circuit 90 included in the reflection phase shifter 900a shown in FIG. 11. In the figure, reference numeral 4 designates an FET, numeral 5 designates a gate bias terminal of the FET 4, numeral 6 designates a transmission line, and numeral 7 designates a connecting terminal. FIGS. 12(b) and 12(c) illustrate the reflection circuit of FIG. 12(a) during the switching operation of the FET 4. In FIG. 12(b), the FET 4 is in the ON state. In FIG. 12(c), the FET 4 is in the OFF state.
In the reflection circuit of FIG. 12(a), the reflection viewed from the input side, i.e., the impedance Z.sub.T of the circuit is represented as ##EQU3## where R.sub.T is the resistance of the whole circuit, X.sub.T is the reactance of the whole circuit, Z.sub.L is the impedance of the distributed constant line 6, Z.sub.FET is the impedance of the FET 4, and .THETA..sub.L is the electrical length of the distributed constant line 6.
The impedances of the FET 4 in the ON and OFF states are respectively represented by the following equations (14) and (15). EQU Z.sub.FET -ON=R.sub.ON= 0 (14) EQU Z.sub.FET -OFF=1/j.omega.C (15)
When the equations (14) and (15) are combined with the equation (13), the following equations (16) and (17) are obtained. ##EQU4## where Zf and Xf are the impedance and the reactance of the reflection circuit, respectively, when the FET is in the ON state, and Zr and Xr are the impedance and the reactance of the reflection circuit, respectively, when the FET is in the OFF state. Since the equations (16) and (17) comprise imaginary components only, the reflection .GAMMA..sub.T is represented as follows: ##EQU5## Assuming that EQU .vertline..GAMMA..sub.T.vertline.= 1 (19)
and EQU .GAMMA..sub.T=.vertline..GAMMA..sub.T.vertline. exp(j.phi.'/2)(20) EQU (.phi.'/2: phase component of .GAMMA..sub.T)
the equation (18) is simplified to EQU tan(.phi.'/2)=2X.sub.T/ 1-X.sub.T.sup.2 (21)
The reactance X.sub.T of the equation (21) becomes tan(.phi.'/4) according to the following formula of double angle trigonometric functions (22), ##EQU6## and, therefore, it is found that the phase shift quantity is doubled by the reflection.
From the equations (12), (18), and (20), the following equation (23) is attained. ##EQU7##
Assuming that EQU .vertline.S21.vertline.=1 (24)
and EQU S21=.vertline.S21.vertline.exp(j.phi./2) EQU (.phi./2: phase component) (25)
the phase .angle.S21 of the reflection phase shifter where the reflection of the reflection circuit is .GAMMA..sub.T is represented by ##EQU8##
If a reflection phase shifter having a phase shift quantity .increment..phi. is designed, the relation between the reflection Ff of the reflection circuit in the FET-ON state and the reflection Fr of the reflection circuit in the FET-OFF state is set as shown in the phase diagram of FIG. 13.
Accordingly, from the equations (16) and (17), the following equations (27) and (28) are attained. ##EQU9## From the equations (27) and (28), element parameters of the reflection circuit shown in FIG. 9 are obtained.
As described above, since the conventional reflection phase shifter provides only one phase shift quantity, as many reflection phase shifters as desired phase shift quantities must be connected in series to make a multiple bit phase shifter, increasing the chip size of the multiple bit phase shifter.
In such a multiple bit phase shifter, an input signal is transmitted through a plurality of the reflection phase shifters connected in series, so that the transmission ..Loss of the signal is unfavorably increased.